The Differential Op Amp Stage

The op amp differential gain stage (also known as a differential amplifier, or subtractor) is shown in Figure 1-5.
The differential amplifier stage (subtractor)
Figure 1-5: The differential amplifier stage (subtractor)
Paired input and feedback network resistances set the gain of this stage. These resistors, RF – RG and RF′ – RG′, must be matched as noted, for proper operation. Calculation of individual gains for inputs V1 and V2 and their linear combination derives the stage gain.
Note that the stage is intended to amplify the difference of voltages V1 and V2, so the net input is VIN = V1 – V2. The general gain expression is then:
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For an ideal op amp and the resistor ratios matched as noted, the gain of this differential stage from VIN to VOUT is:
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The great fundamental utility that an op amp stage such as this allows is the property of rejecting voltages common to V1-V2, i.e., common-mode (CM) voltages. For example, if noise voltages appear between grounds G1 and G2, the noise will be suppressed by the common-mode rejection (CMR) of the differential amp. The CMR is however only as good as the matching of the resistor ratios allows, so in practical terms it implies precisely trimmed resistor ratios are necessary. Another disadvantage of this stage is that the resistor networks load the V1-V2 sources, potentially leading to additional errors.
The Non-Ideal Op Amp— Static Errors Due to Finite Amplifier Gain
One of the most distinguishing features of op amps is their staggering magnitude of DC voltage gain. Even the least expensive devices have typical voltage gains of 100,000 (100dB), while the highest performance precision bipolar and chopper stabilized units can have gains as high 10,000,000 (140dB), or more. Negative feedback applied around this much voltage gain readily accomplishes the virtues of closed-loop performance, making the circuit dependent only on the feedback components.
Non-ideal op amp stage for gain error analysis
Figure 1-6: Non-ideal op amp stage for gain error analysis
As noted above in the discussion of ideal op amp attributes, the behavioral assumptions follow from the fact that negative feedback, coupled with high open-loop gain, constrains the amplifier input error voltage (and consequently the error current) to infinitesimal values. The higher this gain, the more valid these assumptions become.
But in reality, op amps do have finite gain, and errors exist in practical circuits. The op amp gain stage of Figure 1-6 will be used to illustrate how these errors impact performance. In this circuit the op amp is ideal except for the finite open-loop DC voltage gain, A, which is usually stated as AVOL.
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