Home » , » Precision JFET IC Op Amps— AD503 to the AD820/822/824 and AD823 Families

Precision JFET IC Op Amps— AD503 to the AD820/822/824 and AD823 Families

The development of FET input IC op amps was neither as rapid nor as straightforward as the growth of their bipolar IC cousins. There were numerous reasons for this, which will become apparent as this narrative progresses.

First of all, the relative scarcity of high quality FET input op amps early in the history of ICs was certainly not because no one wanted them, but rather because very few could make them. Many FET input op amps had already existed from the days of modular and hybrid types (see preceding section of this article), and FET input amplifiers in general were highly sought after for fast signal processing and low current instrumentation uses. Unfortunately, the development of high performance monolithic FET IC op amps was to become a somewhat long and torturous process.

An early FET input op amp was by Douglas Sullivan and Modesto (Mitch) Maidique. This ADI amplifier was known as the AD503 and AD506, and it was released in 1970. A schematic and photo of the chips used for this design is shown below in Figure 25.
The AD503 and AD506 two-chip hybrid IC op amps
Figure 25: The AD503 and AD506 two-chip hybrid IC op amps

As should be evident from the schematic, this amplifier used two chips. One was a main amplifier chip, somewhat similar to a 741 after the input stage. The input stage consisted of a selected N-channel JFET pair, QA and QB. In the photo to the left, the two active chips can be noted at center right and left, respectively. Also used was a pair of trimmed resistors, RA and RB, shown at the left upper and lower corners of the substrate.

In the case of the AD506J and K grades, these resistors were laser trimmed for lowest offset, delivering to the user devices with maximum offset of no more than 3.5 and 1.5mV, respectively. The non-trimmed AD503 was similar in function, except for higher initial offset (which could be trimmed by the user, via the offset adjust pins). Because of the bootstrapping configuration used, the design had excellent CM specifications—CMR typically was 90dB, with constant bias current over the input range. It is worthy of note that the AD503/506 bias current (as well as later ADI FET input devices) was specified after a five minute warmup period, a conservative method not used by all op amp makers.

Operation of the AD503/506 family was described in a 1971 applications bulletin (Reference 35: Richard S. Burwen, Doug Sullivan, "AD503, AD506 IC FET Input Operational Amplifiers Technical Bulletin," Analog Devices Application Bulletin, August 1971 (Design and application of the AD503 and AD506 two-chip hybrid IC op amp)). There were also related uncompensated amplifier types, namely the AD513 and AD516 (Reference 36: "FET-Input ICs Can Slew at 50V/μs," Analog Dialogue, Vol.5, No. 3, 1971 (The AD513 two-chip hybrid IC op amp)). Later on, an even tighter AD506L grade was introduced, with a 1mV(max) offset and a 10μV/°C(max) drift (Reference 37: "AD506L: Economical Low-Drift FET-Input," Analog Dialogue, Vol. 7, No. 1, 1973 (The AD506L two-chip hybrid IC op amp)).

Shortly after the time frame of the early bipolar op amps, there were also several completely monolithic FET input IC op amps, for example the Fairchild μA740, and the Intersil ICL8007 (Reference 38: Dave Fullagar, “Better Understanding of FET Operation Yields Viable Monolithic JFET Op Amp," Electronics, November 6, 1972 (The ICL8007 IC op amp). The ICL8007 was perhaps the best of these early completely monolithic P-channel FET input op amps, but that isn't saying a lot. Offset voltages could be as high as tens of mV, and drifts several tens of μV/°C. Input current was low, but was about the best that could be said of them.

The problem with all the monolithic FETs of the early seventies was simply that the FET devices themselves were poorly controlled. To make any material improvement in monolithic FET IC op amps, a fundamentally better process was needed.

In 1974, this was to happen, in the form of a paper by two National Semiconductor engineers, Rod Russell and David Culmer (Reference 39: Ronald W. Russell, Daniel D. Culmer, "Ion-Implanted JFET-Bipolar Monolithic Analog Circuits," ISSCC Digest of Technical Papers, February 1974, pp. 140-141, 243 (Ion-implanted JFETs, and the LF155/156/157 series of FET IC op amps)). In this paper Russell and Culmer described a new fabrication technique for making FET devices, using ion-implantation. This allowed more stable P-channel JFETs to be made, along with quality NPN bipolars. In the same paper was also described a new series of FET input op amps, the LF155/LF156/LF157 devices. These parts had much lower offsets and drifts than any previous all-monolithic FET op amp, 5mV(max) for offset and a typical drift of 5μV/°C (Specifications are quoted from December 2001 data sheet for LF155 and LF156 devices).

While the idea of ion-implantation caught on big, and became an industry standard method of IC fabrication, the same was not entirely true for the LF155/156/157 devices. Although they were second sourced (and are still available), others sought a cleaner solution to a standard FET IC op amp topology. The LF155 series used an asymmetrical topology, and there was difficulty controlling the quiescent current.

At PMI, George Erdi designed an FET input op amp series to compete with the National LF155/156/157 parts, which were called the OP15, OP16, and OP17, respectively. They used zener-zap trimming and bias current cancellation; and the best A and E grades achieved offsets of 500μV(max), and drifts of 5μV/°C(max).

RCA introduced their answer for a general purpose FET input op amp, the CA3130, also in 1974 (Reference 40: Otto Schade, Jr. "CMOS/Bipolar Linear Integrated Circuits," ISSCC Digest of Technical Papers, February 1974, pp. 136-137. See also: R. L. Sanquini, “Building C-MOS, Bipolar Circuits on Monolithic Chip Enhances Specs,” Electronics, October 3, 1974 (The CA3130 CMOS IC op amp)). Using a P-channel MOS input stage and a CMOS output stage, this device was suitable for lower voltage, single-supply uses. It was however, not a high precision part, due mostly to the poor stability of the MOS devices used. Nevertheless, it was high on general utility, as were the CA3140 and other spin offs.

Texas Instruments got into the FET op amp market with their own amplifier series in 1978 (Reference 41: Dale Pippenger, Dale May, "Put BIFETs Into Your Linear Circuits," Electronic Design, January 4, 1978, pp. 104-107, 109-111). These devices, in the form of singles, duals and quads of various power ratings (and speed) did use a PFET input pair operating into a current mirror, with a conventional second stage (ala the 101 or 741, but with higher speed). This line, the TL06x, TL07x, and TL08x, became standard devices, and are still available. While the faster slew rate and symmetrical signal path of these devices helped AC applications, they also weren't designed for high precision.

ADI had been working on an improved FET input monolithic IC op amp, and introduced the first of a long series of devices, the AD542, in 1978 (Reference 42: Lew Counts , Rich Frantz, "High-Performance, Low-Cost Bipolar-FET Op Amp," Analog Dialogue, Vol. 12, No. 3, 1978 (The AD542 monolithic FET IC op amp)). This twostage circuit design used a P-channel JFET input differential pair, followed by a second stage integrator. Careful design and laser trimming achieved a maximum offset as low as 0.5mV in the AD542L, and a maximum drift of 10μV/°C. While this was not as good as the best bipolar input amplifiers, it was better than any other monolithic FET had done.

Continuing along this same path were other amplifiers such as the AD544, a higher speed relation to the AD542, introduced in 1980 (Reference 43: "Fast FET Op Amp," Analog Dialogue, Vol. 14, No. 1, 1980 (The AD544 IC op amp)). Both of these devices were designed by Lew Counts, and were aimed at fast settling data acquisition use. They were followed in 1981 by dual counterparts, the AD642 and AD644 (Reference 44: "High-Performance Dual FET Op Amps," Analog Dialogue, Vol. 15, No. 2, 1981 (The AD642/644 IC op amps)). All these devices had trimmed, zero TC supply and input stage currents, for overall stability and predictable slew rate. These features were retained in later precision devices.

This series of JFET input op amps reached their highest precision in 1982, with the introduction of the AD547 (Reference 45: "First Monolithic FET Op Amp with 1μV/°C Drift," Analog Dialogue, Vol. 16, No. 1 1982 (The AD547 drift and offset trimmed IC op amp)). This device, designed by Scott Wurcer, achieved for the first time in a monolithic FET op amp a maximum drift of 1μV/°C, combined with a 250μV(max) offset, for the AD547L grade of the part. The goals of such low offset and drift were met with laser trimming for both offset and drift at the wafer level. This also has become routine for all high precision ADI FET amplifiers.

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