Op Amp Frequency Response

previous Manipulating Op Amp Noise Gain and Signal Gain
There are a number of issues to consider when discussing the frequency response of op amps. Some are relevant to both voltage and current feedback op amp types, some apply to one or the other, but not to both. Issues which vary with type are usually related to small-signal performance, while large-signal issues mostly apply to both.
A good working definition of "large-signal" is where the output voltage swing/frequency limit is set by the slew rate measured at the output stage, rather than the pole(s) of the small signal response. We shall therefore consider large signal parameters applying to both types of op amp before we consider those parameters where they differ.
Frequency Response— Slew Rate and Full-Power Bandwidth
The slew rate (SR) of an amplifier is the maximum rate of change of voltage at its output. It is expressed in V/s (or, more probably, V/μs). We have mentioned earlier why op amps might have different slew rates during positive and negative going transitions, but for this analysis we shall assume that good fast op amps have reasonably symmetrical slew rates.
If we consider a sine wave signal with a peak-to-peak amplitude of 2Vp and of a frequency f, the expression for the output voltage is:
image
This sine wave signal has a maximum rate-of-change (slope) at the zero crossing. This maximum rate-of-change is:
image
To reproduce this signal without distortion, an amplifier must be able to respond in terms of its output voltage at this rate (or faster). When an amplifier reaches its maximum output rate-of-change, or slew rate, it is said to be slew limiting (sometimes also called rate limiting). So, we can see that the maximum signal frequency at which slew limiting does not occur is directly proportional to the signal slope, and inversely proportional to the amplitude of the signal. This allows us to define the full-power bandwidth (FPBW) of an op amp, which is the maximum frequency at which slew limiting doesn't occur for rated voltage output. It is calculated by letting 2Vp in Eq. 1-22 equal the maximum peak-to-peak swing of the amplifier, dV/dt equal the amplifier slew rate, and solving for f:
image
It is important to realize that both slew rate and full-power bandwidth can also depend somewhat on the power supply voltage being used, and the load the amplifier is driving (particularly if it is capacitive).
The key issues regarding slew rate and full-power bandwidth are summarized in Figure 1-54 below. As a point of reference, an op amp with a 1V peak output swing reproducing a 1MHz sine wave must have a minimum SR of 6.28V/μs.
Slew rate and full-power bandwidth
Figure 1-54: Slew rate and full-power bandwidth
Realistically, for a practical circuit the designer would choose an op amp with a SR in excess of this figure, since real op amps show increasing distortion prior to reaching the slew limit point.
Frequency Response— Settling Time
The settling time of an amplifier is defined as the time it takes the output to respond to a step change of input and come into, and remain within a defined error band, as measured relative to the 50% point of the input pulse, as shown in Figure 1-55 below.
Settling time
Figure 1-55: Settling time
Unlike a DAC device, there is no natural error band for an op amp (a DAC naturally has an error band of 1 LSB, or perhaps ±1LSB). So, one must be chosen and defined, along with other definitions, such as the step size (1V, 5V, 10V, etc.). What is chosen will depend on the performance of the op amp, but since the value chosen will vary from device to device, comparisons are often difficult. This is true because settling is not linear, and many different time constants may be involved. Examples are early op amps  using dielectrically isolated (DI) processes. These had very fast settling to 1% of full-scale, but they took almost forever to settle to 10-bits (0.1 %). Similarly, some very high precision op amps have thermal effects that cause settling to 0.001% or better to take tens of ms, although they will settle to 0.025% in a few μs.
It should also be noted that thermal effects can cause significant differences between short-term settling time (generally measured in nanoseconds) and long-term settling time (generally measured in microseconds or milliseconds). In many AC applications, long-term settling time is not important; but if it is, it must be measured on a much different time scale that short-term settling time.
Measuring settling time using a "false summing node"
Figure 1-56: Measuring settling time using a "false summing node"
Measuring fast settling time to high accuracy is very difficult. Great care is required in order to generate fast, highly accurate, low noise, flat top pulses. Large amplitude step voltages will overdrive many oscilloscope front ends, when the input scaling is set for high sensitivity.
The example test setup shown in Figure 1-56 above is useful in making settling time measurements on op amps operating in the inverting mode. The signal at the "false summing node" represents the difference between the output and the input signal, multiplied by the constant k., i.e. the ERROR signal.
There are many subtleties involved towards making this setup work reliably. The resistances should low in value, to minimize parasitic time constants. The back-back Schottky diode clamps help prevent scope overdrive, and allow high sensitivity. If R1=R2, then k = 0.5. Thus the error band at the ERROR output will be 5mV for 0.1% settling with a 10V input step.
In some case, a second (very fast) amplifier stage may be used after the false summing node, to increase the signal level. In any case, testing of settling time must be done with a test setup identical to that used by the op amp manufacturer, to ensure validity.
Many modern digitizing oscilloscopes are insensitive to input overdrive and can be used to measure the ERROR waveform directly— this must be verified for each oscilloscope by examining the operating manual carefully. Note that a direct measurement allows measurements of settling time in both the inverting and non-inverting modes. An example of the output step response to a flat pulse input for the AD8039 op amp is shown in Figure 1-57 below. Notice that the settling time to 0.1% is approximately 18ns.
AD8039 G = +2 settling time measured directly
Figure 1-57: AD8039 G = +2 settling time measured directly
In making settling time measurements of this type, it is also imperative to use a pulse generator source capable of generating a pulse of sufficient flatness. In other words, if the op amp under test has a settling time of 20ns to 0.1%, the applied pulse should settle to better than 0.05% in less than 5ns.
A simple flat pulse generator
Figure 1-58: A simple flat pulse generator
This type of generator can be expensive, but a simple circuit as shown in Figure 1-58 can be used with a reasonably flat generator to ensure a flat pulse output.
The circuit of Fig. 1-58 works best if low capacitance Schottky diodes are used for D1-D2-D3, and the lead lengths on all the connections are minimized. A short length of 50Ω coax can be used to connect the pulse generator to the circuit, however best results are obtained if the test fixture is connected directly to the output of the generator. The pulse generator is adjusted to output a positive-going pulse at "A" which rises from approximately –1.8V to +0.5V in less than 5ns (assuming the settling time of the DUT is in the order of 20ns). Shorter rise times may generate ringing, and longer rise times can degrade the DUT settling time; therefore some optimization is required in the actual circuit to get best performance. When the pulse generator output "A" goes above 0V, D1 begins to conduct, and D2/D3 are reversed biased. The "0V" region of the signal "B" at the input of the DUT is flat "by definition"— neglecting the leakage current and stray capacitance of the D2-D3 series combination. The D1 diode and its 100Ω resistor help maintain an approximate 50Ω termination during the time the pulse at "A" is positive.
Share this article :

0 comments:

Post a Comment

Please wait for approval of your comment .......