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Op Amp Process Technologies

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The wide variety of op amp processes is shown in Figure 1-36 below. The early 1960's op amps used standard NPN-based bipolar processes. The PNP transistors of these processes were extremely slow and were used primarily for current sources and level shifting.
The ability to produce matching high speed PNP transistors on a bipolar process added great flexibility to op amp circuit designs. The first p-epi complementary bipolar (CB) process was introduced by ADI in the mid-1980s. The fts of the PNP and NPN transistors were approximately 700MHz and 900MHz, respectively, and had 30V breakdowns. Since its original introduction in 1985, several additional CB processes have been developed at ADI designed for higher speeds and lower breakdowns. For example, a current 5V CB process has 9GHZ PNPs and 16GHz NPNs. These CB processes are used in today's precision op amps, as well as those requiring wide bandwidths.
Op amp process technology summary
Figure 1-36: Op amp process technology summary
The JFETs available on the Analog Devices' complementary bipolar processes allow high input impedance op amps to be designed suitable for such applications as photodiode or electrometer preamplifiers. These processes are sometimes designated as CBFET.
CMOS op amps, generally have higher offset voltages and offset voltage drift than trimmed bipolar or BiFET op amps, however the Analog Devices' DigiTrim™ process described above yields low offset voltage, while keeping costs low. Voltage noise for CMOS op amps tends to be larger, however, the input bias current is very low. They offer low power and cost (foundry CMOS processes are typically used).
In summary, there is no single IC process which is optimum for all op amps. Process selection and the resulting op amp design depends on the targeted applications and ultimately should be transparent to the customer.
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