Power Electronic Control in Electrical Systems

Pulse-width modulated (PWM) VSCs followed by Three-level three-phase NPC VSC

Other multilevel converter topologies

Single-phase full-bridge NPC VSC

Single-phase half-bridge neutral-point-clamped (NPC) VSC

Conventional three-phase six-step VSC

The conventional three-phase six-switch VSC is shown in Figure 6.32. It consists of six switches S₁-S₆ and six antiparallel diodes D₁-D₆. The number indicates their order of being turned on. A fictitious neutral (o) as a mid-point is also included although in most cases is not available. However, when the converter under consideration is used as an active filter in the case of a four-wire three-phase system, this point (o) is used to connect the fourth-wire. This case will be discussed further in later parts.

The three converter legs are controlled with a phase-shift of 120^o between them. The basic way to control the three-phase six-switch VSC is to turn on each switch for half of the period (180⁰) with a sequence 1, 2, 3, . . . as they are numbered and shown in Figure 6.32.

Fig. 6.32  Conventional three-phase six-switch VSC.

The operation of the converter can be explained with the assistance of Figure 6.33. Specifically, the control signals for each of the six switches are shown in Figure 6.33(a). Clearly, each switch remains on for 180⁰ and every 60⁰ a new switch is turned on and one of the previous group is turned off. At any given time therefore, one switch of each leg is on. Assuming that the fictitious mid-point (0) is available, three square-type waveforms for the voltages v_AO, v_BO, and v_CO can be drawn as shown in Figure 6.33(b). Each of the voltage waveforms has two peak values of V_dc/2, and -V_dc/2, and they are displaced by 120^o from each other.

From the three waveforms v_AO, v_BO, and v_CO, the line-to-line voltage waveforms can be drawn since

The three resultant line-to-line voltage waveforms are then shown in Figure 6.33(c). It is clear that each waveform takes three values (V_dc, 0, -V_dc) and there is a 120^o phase-shift between them. These waveforms have a 60^o interval when they are zero for each half of the period, a total of 120o per period. As explained earlier, each leg can handle current in both directions at any time, since either the turned on switch or the antiparallel diode of the other switch can be the conducting element depending upon the polarity of the output line current.

The potential of the load neutral point (n) shown in Figure 6.32 with respect to the mid-point of the DC bus (0) is drawn in Figure 6.33(d). It can be seen that such a waveform has frequency three times the output frequency and the two peak values are between V_dc/6 and -V_dc/6. Finally, the line-to-load neutral point (n) voltage waveform is illustrated in Figure 6.33(e). Such a voltage waveform has two positive values (V_dc/3 and 2V_dc/3) and two negative ones (-V_dc/3 and -2V_dc/3).

Fig. 6.33 Key waveforms of the three-phase six-step VSC circuit operation. (a) control signals for switches S₁, S₂, S₃, S₄ ,S₅ , S6; (b) voltage waveforms v_AO, v_BO, and v_CO; (c) output line-to-line voltage waveforms v_AB, v_BC, v_CA ; (d) voltage waveform between the load neutral point (n) and the DC bus mid-point (0); (e) voltage waveform between the line point A and the load neutral point n; (f) harmonic spectrum of the line-to-DC bus mid-point; and (g) harmonic spectrum of the line-to-line voltage v_AB.

The harmonics of the various waveforms can be calculated using Fourier series. The fundamental amplitude of the voltage waveforms v_AO, v_BO, and v_CO is

where h is the order of the harmonic.
For the line-to-line voltage waveforms v_AB, v_BC, and vCA  then the fundamental amplitude is

and therefore the rms value of the fundamental component is then

Similarly, the amplitude of the harmonic voltages is

The rms value of the line-to-line voltage including all harmonics is

The  normalized  spectrum  of  the  line-to-DC  bus  mid-point  and  the  line-to-line voltage waveforms are plotted in Figures 6.33(f) and (g) respectively. It can be seen that the voltage waveforms v_AO, v_BO, and v_CO contain all odd harmonics. The load connection as shown in Figure 6.32 does not allow 3rd harmonic and all multiples to flow, and this is confirmed with the spectrum of the line-to-line voltage waveform v_AB where 3rd, 9th and 15th harmonics are eliminated as shown in Figure 6.33(g).
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Single-phase full-bridge VSC

In this section we will examine in detail the single-phase full-bridge VSC. Its power circuit is shown in Figure 6.26. It consists of two identical legs like the half-bridge single-phase converter (Figure 6.23) discussed in Section 6.3.1. Specifically, there are four switching elements (S₁, S₂, S₃, S₄), four antiparallel diodes (D₁, D₂, D₃, D₄) and a DC bus voltage source V_dc that can be a single capacitor. The other leg provides the return path for the current this time and the DC bus mid-point does not need to be available to connect the load. The output voltage v₀ appears across the two points A and B as shown in Figure 6.26.

The control restriction discussed for the single-phase half-bridge topology (Figure 6.23) applies to this converter as well. Clearly the control signals for the switch pairs (S₁, S₂) and (S₃, S₄) must be complementary to avoid any bridge destruction due to shoot through of infinite current (at least theoretically).

There are two control methods for this topology. The first one treats the switches (S₁, S₄) and (S₂, S₃) as a pair. This means that they are turned on and off at the same time and for the same duration. For square-wave operation the switches S₁ and S₄ are on for half of the period. For the other half, the pair of S₂, S₃ is turned on. Like the single-phase half-bridge VSC, the direction of the output current i₀ determines the conduction state of each semiconductor.

When the two switches S₁ and S₄ are turned on, the voltage at the output is equal to the DC bus voltage V_dc. Similarly, when the switches S₂ and S₃ are turned on the output voltage is equal to - V_dc. Such circuit operation is illustrated in Figure 6.27.

In the first case, when the direction of the output current i_o is positive as shown in Figure 6.26, the current flows through switches S₁ and S₄ and the power is transferred from the DC side to the AC one (t₄ < t < t₅). When the current becomes negative, although the switches S₁ and S₄ are turned on, the diodes D₁ and D₄ conduct the current and return power back to the DC bus from the AC side (t₃ < t < t₄). For the other half of the period, when the switches S₂ and S₃ are turned on and the current is positive, the diodes D₂ and D₃ conduct (t₁ < t < t₂). In this

Fig. 6.26 Single-phase full-bridge VSC.

Fig. 6.27 Key waveforms of the single-phase full-bridge VSC circuit operation. (a) output voltage V₀ = V_AB; (b) output current i₀; (c) input DC bus current i_d; (d) harmonic spectrum of the output voltage V₀ = V_AB; (e) harmonic spectrum of the output current i₀; and (f) harmonic spectrum of the input DC bus current i_d.

instance, power is transferred also back to the DC side from the AC side. Finally, when the current is negative, the switches S₂ and S₃ carry the current and assist the converter to transfer power from the DC bus to the AC side (t₂ < t < t₃). In summary, there are four distinct modes of operation for this converter when the control method shown in Figure 6.27 is employed (two inverter modes and two rectifier modes). Simply said, at all times two switches are turned on and the legs are controlled in a synchronized way.

The output voltage v₀ = v_AB is shown in Figure 6.27(a). The output current i₀ and the input DC current i_d are also plotted in Figures 6.27(b) and (c) respectively. Similarly, like the case of the half-bridge topology, the square-wave generated across the AC side includes all odd harmonics and being a single-phase system, the third harmonic is also present (Figure 6.27(d)). These harmonics when reflected back to the DC side source include all even harmonics (Figure 6.27(f).

Fig. 6.28 Quadrants of operation of the single-phase full-bridge VSC.

The fundamental component of the output voltage v₀ waveform has an amplitude value of

                (6.20)

And its various harmonics are given by

where h is the order of the harmonic.

The converter is capable of operating in all four quadrants of voltage and current as shown in Figure 6.28. The various modes and their relationship to the switching and/or conduction state of the semiconductors are also summarized in Table 6.4 for further clarity. The phase relationship between the AC output voltage and AC output current does not have to be fixed and the converter can provide real and reactive power at all leading and lagging power factors. However, the converter itself cannot control the output voltage if the DC bus voltage V_dc remains constant. There is a need to adjust the level of the DC bus voltage if one wants to control the rms value of the output voltage v₀.

There is however a way to control the rms value of the fundamental component of the output voltage as well as the harmonic content of the fixed waveform shown in Figure 6.27(a). In this method, the control signals of the two legs are not

Table 6.4 Modes of operation of the single-phase full-bridge VSC

synchronized  in  any  way  and  the  switches  are  not  treated  as  pairs  like  previously. For the safe  operation  of  the  converter,  the  control  signals  between (S₁ and S₂) and (S₃ and S₄) must be complementary. In this case, there is a phase- shift between the two legs and this way a zero volts interval can appear across the output.

For instance, if switches S₁ and S₃  are turned on at the same time, the output voltage (v_AB) will be zero. The current in the case of other than unity power factor must keep flowing. There is no power exchange between the DC side and the AC one (free-wheeling mode). If the current is positive, the current flows through S₁ and D₃. If the current is negative, it flows through D₁ and S₃. Similarly, when the two bottom switches S₂ and S₄ are turned on at the same time, the output voltage (v_AB) is zero and the output current once again determines which element conducts and allows the output current to continue flowing. Specifically, if the current is positive, the diode D₂ and the switch S₄ are conducting. In the case that the current is negative, the switch S₂ and diode D₄ provide a path for the output current. These extra modes of operation for the single-phase full-bridge topology (Figure 6.26) are also included in Table 6.4 as the free-wheeling modes.

For a given phase-shift (a degrees) between the control signals of the two legs, the waveforms are shown in Figure 6.29. It is clear that the output voltage waveform is a three-level one, being able to have the values of V_dc, 0 and -V_dc as shown in Figure 6.29(a). The control signals are shown in Figures 6.29(b)-(d). It is also clear that between the top and bottom switches of each leg complementary control signals are used. It should be noted that for α = 0, the output voltage becomes similar to the previously presented control method (square-wave, Figure 6.27(a)).

The output voltage v_o  (v_AB) is shown in Figure 6.30(a) along with the output current i_o and the DC bus current i_d in Figures 6.30(b) and (c) respectively. Therefore, by controlling the phase-shift between the two legs (α degrees), the rms value of the fundamental component can be controlled. The amplitude of all odd harmonics, as shown in Figure 6.30(d) for the output voltage, can also be controlled. The output current has only a fundamental component as shown in Figure 6.30(e), where the DC bus current has a DC component and all even harmonics as shown in Figure 6.30(f).

Fig.  6.29  Key  waveforms  of  the  single-phase  full-bridge  phase-shifted  controlled  VSC circuit  operation. (a)  output  voltage  v_o = v_AB;  (b)  control  signal  for  switch  S₁ ;  (c)  control  signal for  switch  S₂;  (d)  control signal for switch S₃; and (e) control signal for switch S₄.

Fig. 6.30 Key waveforms of the single-phase full-bridge phase-shifted controlled VSC circuit operation. (a) output voltage v_o = v_AB; (b) output current i_o; (c) DC bus current i_d; (d) harmonic spectrum of the output voltage v_o = v_AB; (e) harmonic spectrum of the output current i_o; and (f) harmonic spectrum of the input DC bus current id.

Fig. 6.31  Normalized amplitudes of fundamental and harmonics for the phase-shifted output voltage as a function of α (zero volts interval in degrees).

For a given zero interval α in degrees, as shown in Figures 6.29(a) and 6.30(a), the amplitude of the fundamental and harmonics are as follows

where h is the order of the harmonic.
When α = 0  the converter operates as a  square-wave one  (Figure  6.27). The normalized amplitude of the fundamental and the most significant harmonics, i.e. 3rd, 5th, 7th and 9th to the output of the square-wave converter as a function of α, are plotted in Figure 6.31.

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Single-phase half-bridge VSC

Let us consider first the simplest and basic solid-state DC-AC converter, namely the single-phase half-bridge VSC. Figure 6.23 shows the power circuit. It consists of two switching devices (S₁ and S₂) with two antiparallel diodes (D₁ and D₁) to accommodate the return of the current to the DC bus when required. This happens when the load power factor is other than unity. In order to generate a mid-point (0) to connect the return path of the load, two equal value capacitors (C₁ and C₂) are connected in series across the DC input. The result is that the voltage V_dc is split into two equal sources across each capacitor with voltage of V_dc/2. The assumption here is that the value of the capacitors is sufficiently large to ensure a stiff DC voltage source. This simply means that their voltage potential remains unchanged during the operation of the circuit. This also means that the potential of the mid-point (0) is constant with respect to both positive and negative DC bus rails at all times (V_dc/2) and - V_dc/2 respectively).

Fig. 6.22 Single-phase half-bridge VSC.

Let us now examine the operation of this circuit. It can be explained in combination with Figure 6.24. The two control signals for turning on and off the switches S₁ and S₂ are complementary to avoid destruction of the bridge. This would happen due to the throughput of high current coming from the low impedance DC voltage sources, if both switches were turned on simultaneously. When the switch S₁ is turned on (t₃ < t < t₅), the output voltage v₀ = v_AO is equal to the voltage V_dc/2 of the capacitor C₁. The mode of operation of the switching block (S₁ and D₁) is then controlled by the polarity of the output current i₀. If the output current is positive, with respect to the direction shown in Figure 6.23, then the current is flowing through switch S₁ (t₄ < t < t₅, Figure 6.24). If the output current is negative, the diode D₁ is conducting, although switch S₁ is turned on (t₃ < t < t₄). Similarly, if the switch S₂ is turned on (t₁ < t < t₃), the output voltage is equal to the voltage V_dc/2 of the capacitor C₂ with the polarity appearing negative this time. The output current i₀ once again determines the conduction state of the switch and diode. If the output current is positive, the diode D₂ is conducting (t₁ < t < t₂). If the output current is negative, the current flows through switch S₂ (t₂ < t < t₃). Such states of switches and diodes are clearly marked in the waveforms of Figure 6.24 for the various time intervals. The modes of operation of the half-bridge single-phase VSC are also summarized in Table 6.3.

Figure 6.24(a) shows the output voltage waveform v₀ = v_A0 generated by the converter operation as previously explained. Due to the square-wave generated by the converter, the output voltage waveform is rich in harmonics. Specifically, as shown in Figure 6.24(c) all odd harmonics are present in the spectrum of the output voltage. The fact that the converter cannot control the rms value of the output voltage waveform at fundamental frequency is also a limitation. A separate arrangement must be made to vary the DC bus voltage V_dc in order to vary and control the output voltage v₀.

Fig. 6.24 Key waveforms of the single-phase half-bridge VSC circuit operation. (a) output voltage V₀ = V_A0; (b) output current i₀; and (c) harmonic spectrum of the output voltage V₀ = V_A0.

The amplitude of the fundamental component of the output voltage square-wave v₀ shown in Figure 6.24(a) can be expressed using Fourier series as follows

                 (6.18)

The amplitude of all the other harmonics is given by

           (6.19)

where h is the order of the harmonic.

Fig. 6.25 quadrants of operation of the single-phase half-bridge VSC.

The converter discussed here operates in all four quadrants of output voltage and current as shown in Figure 6.25. There are two distinct modes of operation associated with the transfer of power from the DC to the AC side. When the power flows from the DC bus to the AC side, the converter operates as an inverter. The switches S₁ and S₂ perform this function. In the case that the power is negative, which means power is returned back to the DC bus from the AC side, the converter operates as a rectifier. The diodes D₁ and D₁ perform this function.

The capability of the converter to operate in all four quadrants (Figure 6.25)

means that there is no restriction in the phase relationship between the AC output voltage and the AC output current. The converter can therefore be used to exchange leading or lagging reactive power. If the load is purely resistive and no filter is attached to the output the diodes do not take part in the operation of the converter and only real power is transferred from the DC side to the AC one. Under any other power factor, the converter operates in a sequence of modes between a rectifier and an inverter. The magnitude and angle of the AC output voltage with respect to the AC output current control in an independent manner the real and reactive power exchange between the DC and AC sides.

This converter is also the basic building block of any other switch-mode VSC.

Specifically, the combination of the switching blocks (S₁ and the antiparallel diode D₁) and (S₂ and D₂) can be used as a leg to build three-phase and other types of converters with parallel connected legs and other topologies. These types of converters will be described later.

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Voltage-source converters (VSCs) and derived controllers

The solid-state DC-AC power electronic converters can be classified into two categories with respect to the type of their input source on the DC side being either a voltage- Or a Current-source:

1. Voltage-source converters or else voltage-source inverters (VSIs): the DC bus input is a voltage source (typically a capacitor) and its current through can be either positive or negative. This allows power flow between the DC and AC sides to be bidirectional through the reversal of the direction of the current.
2. Current-source converters (CSCs) or else current-source inverters (CSIs): the DC bus input is a current source (typically an inductor in series with a voltage source, i.e. a capacitor) and its voltage across can be either positive or negative. This also allows the power flow between the DC and AC sides to be bidirectional through the reversal of the polarity of the voltage.

The conventional phase-controlled thyristor-based converters can only be current source systems. The modern converters based on fully controlled semiconductors can be of either type. In most reactive power compensation applications, when fully controlled power semiconductors are used, the converters then are voltage-source based. However, the conventional thyristor-controlled converters are still used in high power applications and conventional HVDC systems.

In the following sections, we discuss first the half-bridge and the full-bridge single- phase VSC topologies. It is important to understand the operation principles of these two basic converters to fully understand and appreciate all the other derived topologies, namely the conventional six-switch three-phase VSC and other multilevel topologies.

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Switching transients in the general case

Under practical conditions, it is necessary to consider inductance and resistance. First consider the addition of series inductance in Figure 6.16. In any practical TSC circuit, there must always be at least enough series inductance to keep di/dt within the capability of the thyristors. In some circuits there may be more than this minimum inductance. In the following, resistance will be neglected because it is generally small and its omission makes no significant difference to the calculation of the first few peaks of voltage and current.

The presence of inductance and capacitance together makes the transients oscillatory. The natural frequency of the transients will be shown to be a key factor in the magnitudes of the voltages and currents after switching, yet it is not entirely under the designer's control because the total series inductance includes the supply-system inductance which, if known at all, may be known only approximately. It also includes the inductance of the step-down transformer (if used), which is subject to other constraints and cannot be chosen freely.

It may not always be possible to connect the capacitor at a crest value of the supply voltage. It is necessary to ask what other events in the supply-voltage cycle can be detected and used to initiate the gating of the thyristors, and what will be the resulting transients.

The circuit is that of Figure 6.17. The voltage equation in terms of the Laplace transform is

             (6.11)

Fig. 6.17 Circuit for analysis of practical capacitor switching.

The supply voltage is given by v = v̂ sin (ω₀t + α). Time is measured from the first instant when a thyristor is gated, corresponding to the angle α on the voltage wave- form. By straightforward transform manipulation and inverse transformation we get the instantaneous current expressed as

        (6.12)

where ω_n is the natural frequency of the circuit
            (6.13)

and

              (6.14)

n is the per-unit natural frequency.
The current has a fundamental-frequency component i_AC which leads the supply voltage by π/2 radians. Its amplitude î_AC is given by
             (6.15)

and is naturally proportional to the fundamental-frequency susceptance of the capacitance and inductance in series, that is, B_cn²/(n²-1). The term n²/(n²-1) is a magnification factor, which accounts for the partial series-tuning of the L-C circuit. If there is appreciable inductance, n can be as low as 2.5, or even lower, and the magnification factor can reach l .2 or higher. It is plotted in Figure 6.18.

The last two terms on the right-hand side of equation (6.12) represent the expected oscillatory components of current having the frequency ω_n. In practice, resistance causes these terms to decay. The next section considers the behavior of the oscillatory components under important practical conditions.

Fig. 6.18 Voltage and current magnification factor n²/(n² - 1).

1. Necessary condition for transient-free switching. For transient-free switching, the oscillatory components of current in equation (6.12) must be zero. This can happen only when the following two conditions are simultaneously satisfied:

             (6.16)

            (6.17)

The first of these equations means that the thyristors must be gated at a positive or negative crest of the supply voltage sinewave. The second one means that the capacitors must also be precharged to the voltage v̂n²/(n² - 1) with the same polarity. The presence of inductance means that for transient-free switching the capacitor must be 'overcharged' beyond v̂ by the magnification factor n²/(n² - 1). With low values of n, this factor can be appreciable (Figure 6.18).

Of the two conditions necessary for transient-free switching, the precharging condition expressed by equation (6.17) is strictly outside the control of the gating-control circuits because V­_C0, n, and v̂ can all vary during the period of non- conduction before the thyristors are gated. The capacitor will be slowly discharging, reducing V­_C0; while the supply system voltage and effective inductance may change in an unknown way, changing n. In general, therefore, it will be impossible to guarantee perfect transient-free reconnection.

In practice the control strategy should cause the thyristors to be gated in such a way as to keep the oscillatory transients within acceptable limits. Of the two conditions given by equations (6.16) and (6.17), the first one can in principle always be satisfied. The second one can be approximately satisfied under normal conditions. For a range of system voltages near 1 p.u., equation (6.17) will be nearly satisfied if the capacitor does not discharge (during a non-conducting period) to a very low voltage: or if it is kept precharged or 'topped up' to a voltage near ±v̂n²/(n+2 - 1).

2. Switching transients under non-ideal conditions. There are some circumstances in which equations (6.16) and (6.17) are far from being satisfied. One is when the capacitor is completely discharged, as for example when the compensator has been switched off for a while. Then V_C0 = 0. There is then no point on the voltage wave when both conditions are simultaneously satisfied.

In the most general case V_C0 can have any value, depending on the conditions under which conduction last ceased and the time since it did so. The question then arises, how does the amplitude of the oscillatory component depend on V_C0? How can the gating instants be chosen to minimize the oscillatory component? Two practical choices of gating are: (a) at the instant when v = V_C0, giving sin α = V_C0/v̂; and (b) when dv/dt = 0, giving cos α = 0. The first of these may never occur if the capacitor is overcharged beyond v̂. The amplitude î_osc of the oscillatory component of current can be determined from equation (6.12) for the two alternative gating angles. In Figures 6.19 and 6.20 the resulting value of î_osc relative to î_AC is shown as a function of V_C0 and n, for each of the two gating angles.

From these two figures it is apparent that if V_C0 is exactly equal to v̂, the oscillatory component of current is non-zero and has the same amplitude for both gating angles, whatever the value of the natural frequency n. For any value of V_c0 less than v̂, gating with v = V_C0 always gives the smaller oscillatory component whatever the value of n.

Fig. 6.19 Amplitude of oscillatory current component. Thyristors gated when v = Vco.

Fig. 6.20 Amplitude of oscillatory current component. Thyristors gated when dv/dt = 0.

The conditions for transient-free switching appear in Figure 6.20 in terms of the precharge voltage required for two particular natural frequencies corresponding to n = 2.3 and n = 3.6.

Switching a discharged capacitor

In this case V_C0 = 0. The two gating angles discussed were: (a) when v = V_C0 = 0; and (b) when dv/dt = 0 ( cos α = 0). In the former case only equation (6.17) is satisfied. From equation (6.12) it can be seen that in the second case (gating when dv/dt = 0) the oscillatory component of current is greater than in the first case (gating when v = V_C0 = 0). An example is shown in Figure 6.21 and Figure 6.22.

Fig. 6.21 Switching a discharge capacitor; circuit diagram.

Fig. 6.22 Switching transients with discharge capacitor. (a) gating when V = V_C0 = 0; (b) gating when dv/dt = 0.

The reactances are chosen such at î_AC = 1 p.u. and the natural frequency is given by n = X_C((X_S + X_T) = 3.6 p.u. In case (a), the amplitude of the oscillatory component of current is exactly equal to î_AC. In case (b), the oscillatory component has the amplitude nî_AC and much higher current peaks are experienced. The capacitor experiences higher voltage peaks and the supply voltage distortion is greater.

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Switching transients and the concept of transient-free switching

When the current in an individual capacitor reaches a natural zero-crossing, the thyristors can be left unbated and no further current will flow. The reactive power supplied to the power system ceases abruptly. The capacitor, however, is left with a trapped charge (Figure 6.15(a)). Because of this charge, the voltage across the thyristors subsequently alternates between zero and twice the peak-phase voltage. The only instant when the thyristors can be gated again without transients is when the voltage across them is zero (Figure 6.15(b)). This coincides with peak-phase voltage.

Ideal transient-free switching

The simple case of a switched capacitor, with no other circuit elements than the voltage supply, is used first to describe the important concept of transient-free switching. Figure 6.16 shows the circuit.

With sinusoidal AC supply voltage v = v̂ sin (ω₀t + α), the thyristors can be gated into conduction only at a peak value of voltage, that is, when

              (6.8)

Gating at any other instant would require the current i = Cdv/dt to have a discontinuous step change at t = 0+. Such a step is impossible in practice because of inductance, which is considered in the next section. To permit analysis of Figure 6.16, the gating must occur at a voltage peak, and with this restriction the current is given by

Fig. 6.15 Ideal transient-free switching waveforms. (a) switching on; and (b) switching off.

Fig. 6.16 Circuit for analysis of transient-free switching.

            (6.9)

where α = ±π/2. Now ω₀C = B_C is the fundamental-frequency susceptance of the capacitor, and X_C = 1/B_C its reactance, so that with α = ±π/2

              (6.10)

where î_AC is the peak value of tha AC current, î_AC=v̂B_C= v̂/X_C .

In the absence of other circuit elements, we must also specify that the capacitor be precharged to the voltage V_C0 = ±v̂, that is, it must hold the prior charge ±v̂/C. This is because any prior DC voltage on the capacitor cannot be accounted for in the simple circuit of Figure 6.16. In practice this voltage would appear distributed across series inductance and resistance with a portion across the thyristor switch.

With these restrictions, that is, dv/dt = 0 and V_C0 = ±v̂ at t = 0, we have the ideal case of transient-free switching, as illustrated in Figure 6.15. This concept is the basis for switching control in the TSC. In principle, once each capacitor is charged to either the positive or the negative system peak voltage, it is possible to switch any or all of the capacitors on or off for any integral number of half-cycles without transients.

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The thyristor-switched capacitor (TSC)

Thyristor switched capacitor is defined as 'a shunt-connected, thyristor-switched capacitor whose effective reactance is varied in a stepwise manner by full- or zero- conduction operation of the thyristor valve'.

Principles of operation

The principle of the TSC is shown in Figures 6.12 and 6.13. The susceptance is adjusted by controlling the number of parallel capacitors in conduction. Each capacitor always conducts for an integral number of half-cycles. With k capacitors in parallel, each controlled by a switch as in Figure 6.13, the total susceptance can be equal to that of any combination of the k individual susceptances taken 0, 1, 2 . . . . or k at a time. The total susceptance thus varies in a stepwise manner. In principle the steps can be made as small and as numerous as desired, by having a sufficient number of individually switched capacitors. For a given number k the maximum number of steps will be obtained when no two combinations are equal, which requires at least that all the individual susceptances be different. This degree of flexibility is not usually sought in power-system compensators because of the consequent complexity of the controls, and because it is generally more economic to make most of the susceptances equal. One compromise is the so-called binary system in which there are (k - 1) equal susceptances B and one susceptance B/2. The half-susceptance increases the number of combinations from k to 2k.

The relation between the compensator current and the number of capacitors conducting is shown in Figure 6.14 (for constant terminal voltage). Ignoring switching transients, the current is sinusoidal, that is, it contains no harmonics.

Fig. 6.12 Alternative arangements of three-phase thyristor-switchet capacitor. (a) delta-connected secondary, Delta-connected TSC; ant (b) wye-connected secondary, wye-connected TSC (four-wire system).

Fig. 6.12 Principles of operation of TSC. Each phase of Figure 6.12 comprises of parallel combinations of switched capacitors of this type.

Fig. 6.14 Relationship between current and number of capacitors conducting in the TSC.

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The thyristor-controlled transformer (TCT)

Another variant of the TCR is the TCT (Figure 6.9). Instead of using a separate step- down transformer and linear reactors, the transformer is designed with very high leakage reactance, and the secondary windings are merely short-circuited through the thyristor controllers. A gapped core is necessary to obtain the high leakage reactance, and the transformer can take the form of three single-phase transformers. With the arrangements in Figure 6.9 there is no secondary bus and any shunt capacitors must be connected at the primary voltage unless a separate step-down transformer is provided. The high leakage reactance helps protect the transformer against short- circuit forces during secondary faults. Because of its linearity and large thermal mass the TCT can usefully withstand overloads in the lagging (absorbing) regime.

Fig. 6.9 Alternative arrangements of thyristor-controlled transformer compensator. (a) with wye-connected reactors ant delta-connected thyristor controller; ant (b) wye-connected reactors ant thyristor controller (four-wire system).

The TCR with shunt capacitors

It is important to note that the TCR current (the compensating current) can be varied continuously, without steps, between zero and a maximum value corresponding to full conduction. The current is always lagging, so that reactive power can only be absorbed. However, the TCR compensator can be biased by shunt capacitors so that its overall power factor is leading and reactive power is generated into the external system. The effect of adding the capacitor currents to the TCR currents shown in Figure 6.4 is to bias the control characteristic into the second quadrant, as shown in Figure 6.10. In a three-phase system the preferred arrangement is to connect the capacitors in wye, as shown in Figure 6.6. The current in Figure 6.10 is, of course, the fundamental positive sequence component, and if it lies between I_{C max} and I_{L max} the control characteristic is again represented by equation (6.6). However, if the voltage regulator gain is unchanged, the slope reactance X_S will be slightly increased when the capacitors are added.

As is common with shunt capacitor balks, the capacitors may be divided into more than one three-phase group, each group being separately switched by a circuit breaker. The groups can be tuned to particular frequencies by small series reactors in each phase, to filter the harmonic currents generated by the TCR and so prevent them from flowing in the external system. One possible choice is to have groups tuned to the 5th and 7th harmonics, with another arranged as a high-pass filter. The capacitors arranged as filters, and indeed the entire compensator, must be designed with careful attention to their effect on the resonances of the power system at the point of connection.

Fig. 6.10 Voltage/current characteristics of TCR.

It is common for the compensation requirement to extend into both the lagging and the leading ranges. A TCR with fixed capacitors cannot have a lagging current unless the TCR reactive power rating exceeds that of the capacitors. The net reactive power absorption rating with the capacitors connected equals the difference between the ratings of the TCR and the capacitors. In such cases the required TCR rating can be very large indeed (up to some hundreds of MVAr in transmission system applications). When the net reactive power is small or lagging, large reactive current circulates between the TCR and the capacitors without performing any useful function in the power system. For this reason the capacitors are sometimes designed to be switched in groups, so that the degree of capacitive bias in the voltage/current characteristic can be adjusted in steps. If this is done, a smaller 'interpolating' TCR can be used.

An example is shown schematically in Figure 6.11, having the shunt capacitors divided into three groups. The TCR controller is provided with a signal representing the number of capacitors connected, and is designed to provide a continuous overall voltage/current characteristic. When a capacitor group is switched on or off, the conduction angle is immediately adjusted, along with other reference signals, so that the capacitive reactive power added or subtracted is exactly balanced by an equal change in the inductive reactive power of the TCR. Thereafter the conduction angle will vary continuously according to the system requirements, until the next capacitor switching occurs.

Fig. 6.11 Hybrid compensator with switched capacitors ant 'interpolating' TCR. The switches S may be mechanical circuit breakers or thyristor switches.

The performance of this hybrid arrangement of a TCR and switched shunt capacitors depends critically on the method of switching the capacitors, and the switching strategy. The most common way to switch the capacitors is with conventional circuit breakers. If the operating point is continually ranging up and down the voltage/ current characteristic, the rapid accumulation of switching operations may cause a maintenance problem in the circuit breakers. Also, in transmission system applications there may be conflicting requirements as to whether the capacitors should be switched in or out during severe system faults. Under these circumstances repeated switching can place extreme duty on the capacitors and circuit breakers, and in most cases this can only be avoided by inhibiting the compensator from switching the capacitors. Unfortunately this prevents the full potential of the capacitors from being used during a period when they could be extremely beneficial to the stability of the system.

In some cases these problems have been met by using thyristor controllers instead of circuit breakers to switch the capacitors, taking advantage of the virtually unlimited switching life of the thyristors. The timing precision of the thyristor switches can be exploited to reduce the severity of the switching duty, but even so, during disturbances this duty can be extreme. The number of separately switched capacitor groups in transmission system compensators is usually less than four.

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Thyristor-controlled equipment

Thyristor-controlled reactor (TCR)

Thyristor-controlled reactor (TCR) is defined as: a shunt-connected thyristorcontrolled inductor whose effective reactance is varied in a continuous manner by partial conduction control of the thyristor valve.

Thyristor-switched reactor (TSR) is defined as: a shunt-connected, thyristorswitched inductor whose effective reactance is varied in a stepwise manner by full- or zero-conduction operation of the thyristor valve.

Principles of operation of the TCR

The basis of the TCR is shown in Figure 6.1. The controlling element is the thyristor controller, shown here as two back-to-back thyristors which conduct on alternate half-cycles of the supply frequency. If the thyristors are gated into conduction precisely at the peaks of the supply voltage, full conduction results in the reactor, and the current is the same as though the thyristor controller were short-circuited.

The current is essentially reactive, lagging the voltage by nearly 90°. It contains a small in-phase component due to the power losses in the reactor, which may be of the order of 0.5-2% of the reactive power. Full conduction is shown by the current waveform in Figure 6.2(a).

If the gating is delayed by equal amounts on both thyristors, a series of current waveforms is obtained, such as those in Figure 6.2(a) through (d). Each of these corresponds to a particular value of the gating angle α, which is measured from the zero-crossing of the voltage. Full conduction is obtained with a gating angle of 90°. Partial conduction is obtained with gating angles between 90° and 180°. The effect of increasing the gating angle is to reduce the fundamental harmonic component of the current. This is equivalent to an increase in the inductance of the reactor, reducing its reactive power as well as its current. So far as the fundamental component of current is concerned, the TCR is a controllable susceptance, and can therefore be applied as a static compensator.

Fig. 6.1 Basic thyristor-controlled reactor.

Fig. 6.2 Voltage ant line current waveforms of a basic single-phase TCR for various firing ankles. (a) α = 90°, σ = 180°; (b) α = 100°, σ = 160°; (c) α = 130°, σ = 100°; (d) α = 150°, σ = 60°.

Fig. 6.3 Control law of a basic TCR.

The instantaneous current i is given by

            (6.1)

where V is the rms voltage; X_L = ωL is the fundamental-frequency reactance of the reactor (in Ohms); ω = 2πf; and α is the gating delay angle. The time origin is chosen to coincide with a positive-going zero-crossing of the voltage. The fundamental component is found by Fourier analysis and is given by

                (6.2)

where σ is the conduction angle, related to α by the equation

               (6.3)

Equation 6.2 can be written as

           (6.4)

where B_L(σ) is an adjustable fundamental-frequency susceptance controlled by the conduction angle according to the law

          (6.5)

This control law is shown in Figure 6.3. The maximum value of B_L is 1/X_L, obtained with σ = π or 180, that is, full conduction in the thyristor controller. The minimum value is zero, obtained with σ = 0 (α=180°). This control principle is called phase control.

Fundamental voltage/current characteristic

The TCR has to have a control system that determines the gating instants (and therefore σ), and that issues the gating pulses to the thyristors. In some designs the control system responds to a signal that directly represents the desired susceptance B_L. In others, the control algorithm processes various measured parameters of the compensated system (e.g. the voltage) and generates the gating pulses directly with- out using an explicit signal for B_L. In either case the result is a voltage/current characteristic of the form shown in Figure 6.4. Steady-state operation is shown at the point of intersection with the system load line. In the example, the conduction angle is shown as 130°, giving a voltage slightly above 1.0 p.u., but this is only one of an infinite number of possible combinations, depending on the system load line, the control settings, and the compensator rating. The control characteristic in Figure 6.4 can be described by the equation

                        (6.6)

where I_max is normally the rated current of the reactors shown here as 1 put.

Fig. 6.4 Fundamental voltage/current characteristic in the TCR compensator.

Harmonics

Increasing the gating angle (reducing the conduction angle) has two other important effects. First, the power losses decrease in both the thyristor controller and the reactor. Second, the current waveform becomes less sinusoidal; in other words, the TCR generates harmonic currents. If the gating argles are balanced, (i.e. equal for both thyristors), all odd order harmonics are generated, and the rms value of the nth harmonic component is given by

                    (6.7)

Figure 6.5(a) shows the variation of the amplitudes of some of the major (lower- order) harmonics with the conduction angles, and Figure 6.5(b) the variation of the total harmonic content.

Table 6.2 gives the maximum amplitudes of the harmonics down to the 37th. (Note that the maxima do not all occur at the same conduction angle.)

The TCR described so far is only a single-phase device. For three-phase systems the preferred arrangement is shown in Figure 6.6; i.e. three single-phase TCRs connected in delta. When the system is balanced, all the triples harmonics circulate in the closed delta and are absent from the line currents. All the other harmonics are present in the line currents and their amplitudes are in the same proportions as shown in Figure 6.5 and Table 6.2. However, the waveforms differ from those ones presented in Figure 6.2.

It is important in the TCR to ensure that the conduction angles of the two back-to- back thyristors are equal. Unequal conduction angles would produce even harmonic components in the current, including DC. They would also cause unequal thermal stresses in the thyristors. The requirement for equal conduction also limits σ to a maximum of 180°. However, if the reactor in Figure 6.1 is divided into two separate reactors (Figure 6.7), the conduction angle in each leg can be increased to as much as 360°. This arrangement has lower harmonics than that of Figure 6.1, but the power losses are increased because of currents circulating between the two halves.

Fig. 6.5 TCR Harmonics. (a) major harmonic current components of TCR. Each is shown as a percentage of the fundamental component at full conduction. The percentages are the same for both phase and line currents; and (b) total harmonic content of TCR current, as a fraction of the fundamental component at full conduction. The percentages are the same for both phase and line currents.

Table 6.2 Maximum amplitudes of harmonic currents in TCR^a

Harmonic order	Percentage
1	100.00
3	(13.78)b
5	5.05
7	2.59
9	(1.57)
11	1.05
13	0.75
15	(0.57)
17	0.44
19	0.35
21	(0.29)
23	0.24
25	0.20
27	(0.17)
29	0.15
31	0.13
33	(0.12)
35	0.10
37	0.09

^a Values are expressed as a percentage of the amplitude of the fundamental component at full conduction.
^b The values apply to both phase and line currents, except that triples harmonics do not appear in the line currents. Balanced conditions are assumed.

Fig. 6.6 Three-phase TCR with shunt capacitors. The split arrangement of the reactors in each phase provides extra protection to the thyristor controller in the event of a reactor fault.

Fig. 6.7 TCR with more than 180° of conduction in each leg to reduce harmonic currents.

As already noted, TCR harmonic currents are sometimes removed by filters (Figure 6.6). An alternative means for eliminating the 5th and 7th harmonics is to split the TCR into two parts fed from two secondaries on the step-down transformer, one being in wye and the other in delta, as shown in Figure 6.8. This produces a 30° phase shift between the voltages and currents of the two TCRs and virtually eliminates the 5th and 7th harmonics from the primary-side line current. It is known as a 12-pulse arrangement because there are 12 thyristor eatings every period. The same phase-multiplication technique is used in conventional HVDC rectifier transformers for harmonic cancellation. With the 12-pulse scheme, the lowest-order characteristic harmonics are the 11th and 13th. It can be used without filters for the 5th and 7th harmonics, which is an advantage when system resonances occur near these frequencies. For higher-order harmonics a plain capacitor is often sufficient, connected on the low-voltage side of the step-down transformer. Otherwise a high-pass filter may be used. The generation of third-harmonic currents under unbalanced conditions is similar to that in the six-pulse arrangement (Figure 6.6).

Fig. 6.8 Arrangement of 12-pulse TCR configuration with double-secondary transformer.

With both 6-pulse and 12-pulse TCR compensators, the need for filters and their frequency responses must be evaluated with due regard to the possibility of unbalanced operation. The influence of other capacitor balks and sources of harmonic currents in the electrical neighbourhood of the compensator must also be taken into account. For this purpose, several software packages are available and some examples with a specific one will be provided later.
The 12-pulse connection has the further advantage that if one half is faulted the other may be able to continue to operate normally. The control system must take into account the 30° phase shift between the two TCRs, and must be designed to ensure accurate harmonic cancellation. A variant of the 12-pulse TCR uses two separate transformers instead of one with two secondaries.

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