Protection of semiconductors - snubber circuits

Proper use of the devices presented so far requires determination of semiconductor losses since adequate cooling means have to be provided to keep the device temperature within rated values.

Generally, the semiconductor losses are grouped into three categories (Rocket, 1987):

1. conduction (on-state and dynamic saturation)
2. switching (turn-on and turn-off)
3. off-state.

The relative magnitudes of the conduction and switching losses are greatly dependent on the type of the converter (i.e. resonant, quasi-resonant, PWM, etc.), the operating frequency, the type of the load (i.e. linear or non-linear, resistive or inductive), and certain characteristics of the switch itself (i.e. turn-on time, turn-off time, etc.). Off- state losses are generally a very small portion of the total losses and are considered negligible.

Snubber circuits are a typical way to minimize switching losses in converters (McMurray, 1972; 1980; 1985). In general, snubber circuits are used for the reduction of switching losses and associated stresses (i.e. protection against high dv/dt and di/ dt) of power semiconductor devices. The turn-on and turn-off circuits are placed in series/parallel to the power switching devices, respectively. For instance, one major purpose of using such circuits, especially for BJTS and GTOs is to keep the power device within its safe operating area (SOA).

Two different types of snubber circuits can be considered as follows:

1. dissipative
   
2. non-dissipative (low-loss snubber).
   

The basic difference between them is as follows:

1. In dissipating snubber circuits, the energy stored in reactive elements (limiting di/dt inductor and limiting dv/dt capacitor) is dissipated in resistors and converted into heat. This type is certainly not the best choice to achieve high switching frequencies and/or high power levels.
2. In non-dissipative (low-loss) snubber circuits, there are no substantial losses due to resistors. In this case, losses are only caused by non-ideal device properties, such as conduction and transient switching losses of the switching devices contained in the snubber circuits.

Snubber circuits are employed for the modern semiconductor devices such as power BJTS, MOSFETS, IGBTS, and GTOs. Figure 5.14 shows the conventional dissipating snubber circuits. Specifically, the turn-on snubber R_S-L_S to control the rate of rise of the switch current during turn-on and the turn-off snubber R_S-C_S to control the rise rate of the switch voltage during turn-off are shown. The polarized snubber circuits (turn-on/turn-off) are included. The combined polarized complete turn-on/turn-off snubber circuit is also depicted. The transistor S in each case is the respective semiconductor device that is being protected by the passive snubber components R_S, L_S, C_S and D_S.

With the use of a combined snubber circuit (Figure 5.14), the interaction between the semiconductor device and the snubber circuit is as follows:

1. During turn-on the voltage fall is a linear time function completely dictated by the switch characteristics, while the series snubber inductor L_S dictates the current rise.
2. During turn-off, the current fall is a linear time function completely determined by the switch characteristics, while the voltage rise is determined by the shunt (parallel) snubber capacitor C_S.

The operation of the combined snubber circuit (Figure 5.14) is described as follows:

After switch turn-on, the snubber capacitor C_S, discharges via the semiconductor device through the C_S-R_S-L_S loop. The discharge current is superimposed on the load current. The snubber capacitor C_S voltage reaches zero afterwards, at which moment the snubber polarizing diode D_S begins to conduct and the remaining overcurrent in the inductor L_S decays exponentially through the L_S-R_S loop. Then after switch turn-off, the series snubber inductor L_S begins to discharge and the snubber diode D_S conducts thus connecting C_S in parallel with the semiconductor device. The discharge voltage of the inductor is superimposed over the input voltage already present across the switch. The discharge circuit consists of the branch L_S-C_S-R_S. The inductor current reaches zero afterwards at which moment the snubber polarizing diode D_S blocks and the remaining overvoltage decays exponentially through the C_S-R_S loop.

The advantages of the conventional dissipating snubber circuits can be summarized as follows:

1. Transfer of the switching losses from the semiconductor device to an external resistor;
2. Suppression of high voltage transients;
3. Control of the rise rate of the current during turn-on and the rise rate of the voltage during turn-off;
4. Reduction of the generated 'noise' and the electromagnetic interference;
5. Avoidance of the second breakdown in BJT based transistor inverters.

On the other hand, the following disadvantages associated with these snubber circuits can be identified:

1. The energy stored in the reactive elements is dissipated in external resistors, thus decreasing overall converter efficiency;
2. Overvoltages can still occur as a result of resonances between snubber or stray inductances and snubber or parasitic capacitors;

	Turn-on (Series)	Turn-off (Shunt)
Non Polarized
Polarized

Combined

Fig. 5.14 Conventional dissipating snubber circuits.

Extra components are required, thus increasing power circuit complexity; The power losses also complicate the thermal layout and the heat sink design thus leading to an increase in cost.

At higher power levels and switching frequencies, it is more desirable to use non-dissipative (low loss) snubber circuits. The snubber circuits previously presented (Figure 5.14) can be used for each switching device separately. However, it is more efficient to combine components and to use for instance one reactive element (inductor/capacitor) for both switches of a PWM inverter leg.

Fig. 5.15 An inverter leg with the improved dissipative snubber circuit.

Fig. 5.16 A non-dissipative snubber circuit for high power GTO inverter.

There are various snubber configurations that improve the overall component count by reducing the number of snubber elements (Undeland, 1976; Undeland et al., 1983; 1984; Zach et al., 1986). In many cases and depending upon the application of the converters, its power level, etc. the snubber circuits maybe more or less complicated. Some snubber configurations proposed for converters are shown in Figures 5.15, 5.16 and 5.17 showing increased complexity and different arrangements in trying to recover the high energy associated with the operation of the snubber circuit (Holtz et al., 1988; 1989).

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